NGDAnno Files

This section describes the NGDAnno input and output files.

Input Files

Input to the NGDAnno program is the following.

• NCD file - Physical design file. The design may be mapped only, partially or fully placed, and partially or fully routed.
  
  
• NGM file (optional but recommended) - Mapped NGD file created by the MAP program.
  
  
• PCF file (optional) - Physical constraints file.
  
  

Output Files

Output from the NGDAnno program is the following.

• NGA file - A back-annotated NGD file.
  
  
• ALF file - An annotation report file containing information about the NGDAnno run. The ALF file has the same root name as the output NGA file and an .alf extension. The file is written into the same directory as the output NGA file.
  
  

The following warning appears on your screen and in the ALF report file if a logical annotation failure occurs.

WARNING:basna:22 - NGDANNO found physical components for which 100 percent back-annotation is not possible. (These components are listed below.) Some reasons these components may not be fully back-annotatable include:

1. The logic was replicated during physical mapping.

2. MAP was directed to optimize the logic through use of the -oe or -os option, or the OPTIMIZE or OPT_EFFORT design attribute.

3. The component's configuration implies a more complex delay model than can be accurately represented in the original design logic. An example of such a configuration is an XC4000-family CLB containing both carry logic and multiple flip-flops.

Simulation models for the following components will be constructed from the NCD netlist. Signal names buried within these components will be lost.

When using minimum or prorated delays rather than standard delays (for example, when using the -s min option or when you have included prorating constraints in your PCF file), one of the following warnings appears on your screen and in the ALF report file.

WARNING - the delay calculations are different from the standard delays. These are MINIMUM delays and therefore represent timing delays which may not accurately reflect the typical process delays.

or

WARNING - the delay calculations are different from the standard delays. These are PRORATED delays and therefore represent timing delays which may not accurately reflect the typical process delays.These delays were calculated at 50C and 3.3V.

At the end of the operation, the following summary appears listing the number of annotated logical models, annotated physical models, and annotated physical macros.

119 logical models annotated

4 physical models annotated

6 macros annotated

In this case, the netlist writer looks at each physical block in the NGA file. If its logical model was annotated, the logic model (including all user signals and primitives it contains) is used in the simulation netlist. If the physical model was annotated, the physical view of the block (containing Xilinx-generated signals and primitives) is used in the simulation netlist.