X74_298

Quadruple 2-Input Multiplexer with Storage and Negative-Edge Clock

X74_298 selects 4-bits of data from two sources (D1 - A1 or D2 - A2) under the control of a common word select input (WS). When WS is Low, D1 - A1 is chosen, and when WS is High, D2 - A2 is chosen. The selected data is transferred into the output register (QD - QA) during the High-to-Low transition of the negative-edge triggered clock (CK).

Inputs				Outputs
WS	A1 - D1	A2 - D2	CK	QA - QD
0	A1 - D1	X		a1 - d1
1	X	A2 - D2		a2 - d2
an - dn = state of referenced input one setup time prior to active clock transition

Figure 11.38 X74_298 Implementation XC3000, XC4000, XC5200, Spartans

Figure 11.39 X74_298 Implementation XC9000