Loading the Design into the Viewlogic Simulator

If you checked the Invoke Simulator when Finished checkbox when creating the VSM file, the Viewlogic simulator opened automatically. Otherwise, to open the Viewlogic simulation environment, click on the ViewSim icon shown in the figure that follows.

You can also launch the Viewlogic simulation tools by opening Digital Fusion. Click on the Digital Fusion icon shown in the next figure. This also requires an extended license.

To load a VSM file into ViewSim, select File Load ViewSim Netlist.Navigate to your project directory and select time_sim.vsm.

Loading XMM Files

If the design contains RAM elements, and if the target family supports initial values on RAM, the Flow Engine generates a file with the .xmm extension when you run NGD2EDIF. This command file, for use in the Viewlogic Integrated Simulation Environment (Viewlogic simulator), contains LOADM commands for each Viewsim RAM builtin primitive in the design.

To initialize the RAMs, execute the .xmm file from the Viewlogic simulator prompt as follows.

execute time_sim.xmm

You can include this statement in your design command file to automatically load the initial contents. The Viewlogic simulator restart command clears the RAM contents. If you issue a restart in your command file, execute the .xmm file after that.

Executing Global Reset

After loading the design into the simulation environment and initializing the RAM/ROM components and external signals, execute a global set/reset (GSR) command. This mimics the startup sequence of the FPGA or CPLD that you are simulating.

For example, for an XC4000 series device, run the following commands.

h GSR

sim 1000

l GSR

The names and polarities of the GSR signals appear in the following table.

Table 6_1 Global Set/Reset Signals

Annotating Values to Original Schematic

Normally, node values calculated in the simulator annotate automatically to the Viewdraw schematic of the same name.

However, because you gave the name time_sim to your timing simulation netlist, the VSM file created has a different name than the original schematic (to avoid conflicts with the original EDIF or WIR files). You must explicitly tell the simulator to annotate values to the original schematic, using the following command from the Viewlogic simulator.

schemnam <design>

The <design> is the top-level schematic name. Values then appear in the Viewdraw window.