Books

Multiple printed and online books are available for Foundation Series 1.5 and on the various tools included with Foundation Series 1.5.

Printed Books

The Foundation Series 1.5 Install and Release Document describes installation procedures, new features, supported devices, and the most critical known issues. It also includes information on licensing registration required for the Base Express and Foundation Express products.

The Foundation Series Quick Start Guide 1.5 provides an overview of the features and additions to Xilinx's 1.5 software. This document contains an overview of design entry tools and design implementation tools. It contains an advanced tutorial for a Schematic-based design and for the HDL version of the design.

Online Books

You must use the provided online documentation viewer (the DynaText^® 3.1 browser) to read the Xilinx online books. The viewer and books, except for the Answers Book, are on the Foundation Documentation CD-ROM. You can install the viewer and books on your PC or you can run the viewer and access the books directly from the CD-ROM.

The Answers Book is on the Foundation Tools CD. You must install it on your PC to access it.

Foundation-Specific Online Books

The following online books contain information that applies only to the Xilinx Foundation Series products.

Title	Description
Foundation Series Quick Start Guide 1.5	This guide gives an overview of the features and additions to Xilinx's Foundation 1.5 product. The primary focus of this guide is to show the relationship between the design entry tools and the design implementation tools. The guide also contains in-depth tutorials for a schematic-based and HDL-based stop watch design.
Foundation Series User Guide	This guide provides a detailed description of the Foundation design methodologies, design entry tools, and both functional and timing simulation. The manual also briefly describes the Xilinx design implementation tools.
Verilog Reference Guide	This manual describes how to use Xilinx Foundation Express to translate and optimize a Verilog HDL description into an internal gate-level equivalent.
VHDL Reference Guide	This manual describes how to use Xilinx Foundation Express to compile VHDL designs.
Answers Book	This book contains Foundation application solution records in the Answers Database at the time of this release.

Design Entry Online Reference Books

The following books contain additional information not found in the Xilinx-specific books regarding the Xilinx schematic library components (and constraints) and LogiBLOX.

Title	Description
Libraries Guide	This book describes the logic elements (primitives or macros), that you use to create your designs as well as the attributes and constraints used to process elements during logic implementation. It also discusses relationally placed macros (RPMs), which are macros that contain relative location constraints (RLOC) information. The Xilinx libraries enable you to convert designs easily from one family to another.
LogiBLOX Reference/User Guide	This guide describes the high-level modules you can use to speed up design entry and the attributes that support logic synthesis, primarily for FPGA architectures. It also explains how to use the LogiBLOX program to create designs and the different types of logic synthesis completed by the LogiBLOX program.

Title

Description

Libraries Guide

This book describes the logic elements (primitives or macros), that you use to create your designs as well as the attributes and constraints used to process elements during logic implementation. It also discusses relationally placed macros (RPMs), which are macros that contain relative location constraints (RLOC) information. The Xilinx libraries enable you to convert designs easily from one family to another.

LogiBLOX Reference/User Guide

This guide describes the high-level modules you can use to speed up design entry and the attributes that support logic synthesis, primarily for FPGA architectures. It also explains how to use the LogiBLOX program to create designs and the different types of logic synthesis completed by the LogiBLOX program.

Implementation-Related Online Books

The following books contain detailed information on the Xilinx implementation tools. Much of the information contained in these books is for the standalone or command line versions of the tool.

Title	Description
Constraints Editor User Guide (Beta Version)	This manual describes the Xilinx Constraints Editor GUI that can be used after the design has been implemented to modify or delete existing constraints or add new constraints to a design.
Design Manager/Flow Engine Reference/User Guide	This manual describes the Design Manager, a tool for managing multiple implementations of the same design. This manual also explains the Flow Engine, which implements designs, and explains how to interact with other programs that run in the Design Manager environment; namely, the Design Editor, the Timing Analyzer, the Hardware Debugger, the PROM File Formatter, and the PROM Programmer.
Development System Reference Guide	This book describes the Xilinx design implementation software, which includes programs to generate EDIF files, LCA files, and BIT files. The book covers all the program options and files that are generated by these programs.
Development System User Guide	This guide describes the Xilinx Alliance design flow, including design entry, implementation, and verification. It also addresses design entry methodology selection, configuration modes as well as readback and verification. This guide also describes boundary scan for XC4000 and XC5200 devices.
EPIC Design Editor Reference/User Guide	EPIC is a graphical editor used to display and configure FPGAs. EPIC enables you to place and route critical components before running automatic place and route tools on an entire design, modify placement and routing manually, interact with the physical constraints file (PCF) to create and modify constraints, and verify timing against constraints.
Floorplanner User Guide	This book describes the Floorplanner, an optional graphical interface tool to help you improve performance and density of your design.
Hardware User Guide	This manual describes the Xilinx Demonstration hardware and its associated software interfaces. The hardware includes the FPGA and CPLD demonstration boards, which are used for design verification.
Timing Analyzer Reference/User Guide	This manual describes Xilinx's Timing Analyzer program, a graphical user interface tool that performs static analysis of a mapped FPGA or CPLD design. The mapped design can be partially or completely placed, routed, or both.

Device Programming Online Books

Detailed information on the device programming process is included in the following books.

Title	Description
JTag Programmer Guide	This guide documents the graphical interface used for in-system programming and verification of CPLD and FPGA parts. The guide also describes how to set up and use JTAG download cables.
Hardware Debugger Reference/User Guide	(FPGAs only) This manual describes how to program, verify, and debug FPGA devices. It describes the XChecker cable and explains how to connect the cable pins to your target device for various functions: downloading, verification, and debugging. It also includes a tutorial for debugging a design using the demonstration boards as target devices.
PROM File Formatter Reference/User Guide	(FPGAs only) This manual explains how to use a Windows-based tool to format bitstream files into HEX format files compatible with Xilinx and third-party PROM programmers. You use the PROM files to program a PROM device, which is then used to configure daisy chains of one or more FPGAs for one application (configuration) or several applications (reconfiguration).