Device Programming

When the design meets your requirements, the last step in its processing is programming the target device. To initiate this step, click the Programming button in the project flowchart. The Select Programming dialog appears listing one or more of the following device programming tools: JTAG Programmer, Hardware Debugger, PROM File Formatter. For CPLD designs, you must use the JTAG Programmer.

JTAG Programmer

The JTAG Programmer downloads, reads back, and verifies FPGA and CPLD design configuration data. It can also perform functional tests on any device and probe the internal logic states of your design.

PROM File Formatter

The PROM File Formatter is available for FPGA designs only. The PROM File Formatter provides a graphical user interface that allows you to do the following.

• Format BIT files into a PROM file compatible with Xilinx and third-party PROM programmers
  
  
• Concatenate multiple bitstreams into a single PROM file for daisy chain applications
  
  
• Store several applications in the same PROM file
  
  

Hardware Debugger

The Hardware Debugger is a graphical interface that allows you to download an FPGA design to a device, verify the downloaded configuration, and display the internal states of the programmed device.