RTL Options

cosim+<ias>
Runs the test in cosimulation mode, using the argument as the instruction accurate simulator.

class+file+file...
Loads the class files listed. Also sends commands to IAS to load the same files.

define+TPL_DBG
Creates a Signalscan dump of signals in the design.

define+IU_DBG
Creates a Signalscan dump of IU signals.

define+FPU_DBG
Creates a Signalscan dump of FPU signals.

define+PSU_DBG
Creates a Signalscan dump of PCSU signals.

define+ICU_DBG
Creates a Signalscan dump of ICU signals.

define+DCU_DBG
Creates a Signalscan dump of DCU signals.

define+SMU_DBG
Creates a Signalscan dump of SMU signals.

define+BIU_DBG
Creates a Signalscan dump of BIU signals.

dcu_debug
Enables the DCU debug monitor, which prints out all accesses made to the DCU to the log file.

fpu_debug
Emits verbose information for FPU debugging in the log file

sst_control
Creates a Signalscan dump file for a set of clock-cycle ranges. Before using this argument, create a file named sst_control in the test directory that contains clock-cycle counts in hexadecimal, one value per line. Each set of two values specifies a start clock cycle-count and a stop cycle-count count.

dump_ias_stats
Sends a dumpStats command to IAS at the end of the run.

expcount
Flags runtime exception handlers to increment an exception counter and return instead of aborting the test, which is used for exception testing.

cacheinvalidate
Flags reset code to explicitly invalidate instruction and data caches before enabling them. By default, the caches start off with all lines invalid.

flush
Flags reset code to flush the data caches after the test finishes.

dcu_off
Flags reset code to keep the data cache disabled.

icu_off
Flags reset code to keep the instruction cache disabled.

maxwm
Flags reset code to set dribbler watermark settings to the highest legal values of 48 and 56.

minwm
Flags reset code to set dribbler watermark settings to the lowest legal values of 8 and 16.

handle
Flags to trap handlers that object references should use handles. This command causes all object references to have the handle bit set.

max_instr_count
Reads a file max_instr_count in the current directory, which must contain a single hexadecimal number. This number is the instruction count after which simulation terminates. This option applies to RTL only.

max_clk_count
Reads a file max_clk_count in the current directory, which must contain a single hexadecimal number. This number is the clock count after which simulation terminates. This option applies to RTL only.

ibuf_mon
Enables the instruction buffer monitor, which prints out various states of the instruction buffer which were hit during the simulation. See Section 15.2 of the picoJava-II Verification Guide.

statistics
Enables statistics monitor, which tracks statistics on the number of valid stack cache entries and the number of times critical timing paths are hit.

smu_check
Enables SMU monitor.

rand_ack1
rand_ack2
s1 - s6
Initializing the memory control to return memory acknowledgments at random intervals. rand_ack1 randomizes the number of clocks to the first acknowledgment. rand_ack2 randomizes the number of clocks to subsequent acknowledgments. s1-s6 specify different seeds to initialize the random number generator.

smu_hold
hold_seed_2
hold_seed_3
Injects random SMU hold signals at the full-chip level. hold_seed2 and hold_seed3 use different seeds from the default smu_hold. hold_seed2 and hold_seed3 must also have +smu_hold specified.

int_cmd
Generates controlled interrupts in relation to the occurrence of the event specified by INT_TRIGGER. Generates an interrupt of level INT_LEVEL 0 to 4 cycles after the INT_TRIGGER event. See file sim/env/int_cmd_file.v.

int_cycle_0
int_cycle_1
int_cycle_2
int_cycle_3
int_cycle_4
Specifies the number of cycles after the INT_TRIGGER event (0, 1, 2, 3, or 4) the interrupt is sent to the CPU.

int_cntl
Creates multiple interrupts simultaneously See file sim/env/powerdown_monitor.v.

int_random
Enables random interrupts to the CPU. See file sim/env/powerdown_monitor.v.

scheduled_interrupts
Reads pairs of hexadecimal numbers from the interrupt_table in the current directory, one number on each line. The first number in a pair indicates the clock cycle in which to signal an interrupt. The IRL of the interrupt is the second number in the pair. The RTL does not support NMI.

no_io_pin_stats
Suppresses printing of I/O pin statistics at the end of simulation.

no_ucode_mon
Disable the microcode monitor, which is enabled by default.

pj_halt
Forces the pj_halt signal to high for the duration of the test. This option overrides single_step option.

record
Records the pin assertions and dump them to pico_pin.tape and pico_pout.tape.

restart
Initializes cache rams using the files dram0, dram1, dtag0, dtag1, dstat, itag and iram in the current directory. The chk2mem program can create these files.

bmem+<filename>
Loads a .binit format file into memory. Steam can only accept the option +bmem+reset.binit.

tmem+<filename>
Loads a .init format file into memory. Steam can only accept the option +tmem+reset.init.

halt_check
Checks that breakpoint halt mode was entered at least once.

usage
Output onlline help.

Memory Loading Options to pj2vcs and pj2vlog (RTL only)