목차
PPT 슬라이드
Programmable Logic Takes Market Share
from Others
PPT 슬라이드
PPT 슬라이드
PPT 슬라이드
Why Xilinx?
Xilinx Revenue Growth
High Density FPGA Sales ( gates,
Previous 4 Quarters)
Worldwide Sales
Who’s Using Xilinx
Where Xilinx Fits in the Electronics
Industry
How Customers Use Programmable Logic
Market Segments
Xilinx Application Examples
Strategic Business Model Ensures Focus
Xilinx’ Fabless Advantage
Process Technology Leadership Roadmap
Density Roadmap
Xilinx vs Other FPGA Interconnect
Technology
Performance Roadmap
Power Roadmap (for constant gates &
frequency)
Hardwire for High Volume 2001
Xilinx Pioneers FPGA Packages
Availability of LogiCores
Xilinx FPGA Architectures
Xilinx Leads - Others Follow
A History of Software Innovation
Overview the FPGA Basic Architecture
PLD Advantages Vs Gate Array
CPLDs and FPGAs
What is the FPGA
I/O Block (IOB)
IOB Primitives
Use Pull-ups/Pull-downs to Prevent
Floating
Slew Rate Control
Use I/O Registers
CLB (Configurable Logic Block)
Flip-Flops in the CLB
Combination Logic Resources
FPGA Lookup Tables
Look-Up Tables
XC4000 Select-RAM Advantages
ROM is Equivalent to Logic
RAM Provide 16X Flip-Flops
RAM for Status registers
16x32 FIFO Uses Only 32 CLBs with RAM
Dual-Port RAM
Fast Memory: Dual-Port RAM
Higher Utilization: Dual-Port RAM
Programmable Interconnect
PPT 슬라이드
Global Clock Buffers
Use Global Clock Buffers
Use Extra Global Buffers
Global Buffers Interconnect
How to use to Xilinx Foundation Tool
PPT 슬라이드
Library Manager
Some Useful Commands
PPT 슬라이드
Wires and Buses
Drawing Bus Taps
Query/Find Window
Adding Hierarchy
Entering a Level of Hierarchy
Symbol Properties
Symbol Editor
Importing Viewlogic Schematics
Some Useful Commands
LogiBLOX
Module Types
Counters
Adder/Subtracters
Memories
Multiplexers
Tri-state Buffers
Inputs/Outputs
Pads
Waveform Viewer
Inserting Probes
Component Selector
Stimulator Selector
Simulator Toolbox
Displaying Buses
Some Useful Commands |