Sets
A set is a collection of signals and constants. Any operation applied to a set is applied to each element in the set. Sets simplify ABEL-HDL logic descriptions and test vectors by allowing groups of signals to be referenced with one name.
For example, you could collect the outputs (for example, B0-B7) of an eight-bit multiplexer into a set named MULTOUT, and the three selection lines into a set named SELECT. You could then define the multiplexer in terms of MULTOUT and SELECT rather than individual input and output bits.
A set is represented by a list of constants and signals separated by commas or the range operator (..) and surrounded by brackets. For example,
Sample Set Description
[S0,S1,S2] select lines (SELECT)
The above sets could also be expressed by using the range operator; for example,
[B0..B7]
[S0..S2]
Identifiers used to delimit a range must have compatible names: they must begin with the same alphabetical prefix and have a numerical suffix. Range identifiers can also delimit a decrementing range or a range which appears as one element of a larger set; for example,
[A7..A0] "decrementing range
[Q1,Q2,.X.,A10..A7] "range within a larger set
For set specifications, the brackets do not denote optional items. The brackets are required to delimit the set. ABEL-HDL source file sets are not mathematical sets.