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Running Re-Entrant Routing on FPGAs

Use re-entrant routing to further route an already routed design. The design maintains its current routing and additional routing is added.

You can reroute connections by running cost-based cleanup, delay-based cleanup, and additional re-entrant route passes. Cleanup passes attempt to minimize the delays on all nets and decrease the number of routing resources used. Cost-based cleanup routing is faster while delay-based cleanup is more intensive.

Re-entrant routing offers the following advantages.


NOTE

The FPGA Re-entrant Route command is supported for the FPGA device families only.


To Perform Re-Entrant Routing

  1. Select Setup FPGA Re-entrant Route from the Flow Engine.

    The FPGA Re-entrant Route dialog box appears, as shown in the “FPGA Re-entrant Route Dialog Box” figure of the “Menu Commands” chapter.

  2. Select Allow Re-entrant Routing to route the previously routed design again.

  3. Select a number between 1 and 5 for the Run _ Cost-Based Cleanup Passes field.

    These cleanup passes reroute nets if the new routing uses less costly resources than the original configuration. Cost is based on pre-determined cost tables. Cost-based cleanup usually has a faster runtime than the delay-based cleanup, but does not reduce delays as significantly.


    NOTE

    If you run both cost-based and delay-based cleanup passes, the cost-based passes run first.


  4. Select a number between 1 and 5 for the Run _ Delay-Based Cleanup Passes field.

    These cleanup passes reroute nets if new routing will minimize the delay for a given connection. Delay-based cleanup usually produces faster in-circuit performance.

  5. Select a number between 1 to 2000 for the Run _ Re-entrant Route Passes field to run additional re-entrant routing passes.

    These passes are either timing driven or non-timing driven depending on whether you specified timing constraints.

  6. Select Use Timespecs During Re-entrant Route if you want to reroute the design within the specified timing constraints in your design file.

  7. Click OK.

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