To download your design, you must successfully run implementation to create a configuration bitstream. Xilinx provides either the Parallel Cable III or the XChecker cable, depending on which development system you are using, to download the bitstream to a device.
You can use the XChecker cable to read back and verify configuration data. Detailed cable connection and daisy-chain information is provided in the Hardware Debugger Reference/User Guide.
The Xilinx Parallel Cable III can be used for FPGA and CPLD design download and readback, but it does not have a design verification function.
With the XChecker cable, you can use the Hardware Debugger Pick function to take snapshots of the circuit at specific clock cycles. You can obtain these snapshots by performing serial readback of the nodes during in-circuit operation. With the Hardware Debugger software, you can speed up your analysis by limiting the readback bitstream to only those nodes and clock cycles in which you have interest.
You can also use the XChecker cable to probe your design after you download it. Probing internal nodes allows you to pinpoint the location of any design problems.
Use the XChecker cable when you do not want to specify additional IOBs and routing resources on your Xilinx FPGA for probing. This allows you to decide how you want to probe after you have downloaded your design.
You can use JTAG programmer to download, read back, and verify design configuration data and to perform functional tests on any FPGA or CPLD device. You can also use it to probe internal logic states of a CPLD design.
JTAG Programmer uses sequences of JTAG instructions to perform programming and verification operations.
You need to provide JEDEC files for each XC95000 device, BIT files for each Xilinx FPGA device in the JTAG programming chain, and BSDL files for the remaining devices.
JTAG Programmer supports the following Xilinx device families: XC4000E/L/EX/XL/XV/XLA, XC5200, XC95000/XL, and Spartan/XL.
There are two download cables available for use with the JTAG Programmer. The first is an RS232 serial cable known as the XChecker Cable. The second is the Parallel Download Cable which can be connected to a PC's parallel printer port.
There are a few advantages to be considered in selecting a cable:
Refer to the JTAG Programmer Guide in the Dynatext online book collection for complete information on the JTAG Programmer.
The Hardware Debugger is a graphical interface that allows you to download a design to a device, verify the downloaded configuration, and display the internal states of the programmed device. Use the program to perform the following tasks.
You can use the Hardware Debugger with the following Xilinx devices: XC3000A, XC3000L, XC3100, XC3100A, XC3100L, XC4000E, XC4000EX, XC4000L, XC4000XL, XC4000XV, XC5200, Virtex, Spartan and Spartan XL.
Your target board can be either a Xilinx FPGA demonstration board or your own board. The demonstration boards can be used to test most designs.
Refer to the Hardware Debugger Reference/User Guide in the Dynatext online book collection for complete information on the Hardware Debugger.
The PROM File Formatter provides a graphical user interface that allows you to format BIT files into a PROM file compatible with Xilinx and third-party PROM programmers. It is also used to concatenate multiple bitstreams into a single PROM file for daisy chain applications. This program also enables you to take advantage of the Xilinx FPGA reconfiguration capability, as you can store several applications in the same PROM file.
PROM files are also compatible with the Xilinx Hardware Debugger software. You can use the Hardware Debugger to download a PROM file to a single FPGA or to a daisy chain of FPGA devices.
A Xilinx PROM file consists of one or more data streams. In this context, a data stream represents all the configuration data required to implement a given application. Each data stream contains one or more BIT files and once saved, will have a separate preamble and length count.
The PROM file can be formatted in one of three industry standard formats: Intel MCS-86®, Tektronix TEKHEX, and Motorola EXORmacs.
You can also format BIT files into a HEX format file. This file type is not considered a PROM file since you cannot use it to program PROM devices. A HEX format file is ordinarily used as input to user-defined programs for microprocessor downloads.
You can store PROM files in PROM devices or on your computer. In turn, you can use the files to program your FPGA devices either from a PROM device on your board or from your computer using a serial or parallel cable. Refer to the Hardware Debugger Reference/User Guide for more information.
Refer to the PROM File Formatter Reference/User Guide in the Dynatext online book collection for complete information on the PROM File Formatter.
