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Verilog Reference Guide
Chapter 3: Structural Descriptions

Macromodules

The macromodule construct makes simulation more efficient by merging the macromodule definition with the definition of the calling (parent) module. However, Foundation Express treats the macromodule construct as a module construct. Whether you use module or macromodule, the synthesis process, the hierarchy it creates, and the end result are the same. The following example shows how to use the macromodule construct.

macromodule adder (in1,in2,out1);
   input [3:0] in1,in2;
   output [4:0] out1;

   assign out1 = in1 + in2;
endmodule

Note: When Foundation Express instantiates a macromodule, a new level of hierarchy is created.