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This section presents the syntax of the supported Verilog language in Backus Naur Form (BNF) and the syntax formalism.
Note: The BNF syntax convention used in this section differs from other syntax convention used elsewhere in this manual.
White space separates lexical tokens.
name is a keyword.
<name> is a syntax construct definition.
<name> is a syntax construct item.
<name>? is an optional item.
<name>* is zero, one, or more items.
<name>+ is one or more items.
<port> <,<port>>* is a comma-separated list of items.
::= gives a syntax definition to an item.
||= refers to an alternative syntax construct.
<source_text>
::= <description>*
<description>
::= <module>
<module>
::= module <name_of_module> <list_of_ports>? ;
<module_item>*
endmodule
<name_of_module>
::= <IDENTIFIER>
<list_of_ports>
::= ( <port> <,<port>>* )
||= ( )
<port>
::= <port_expression>?
||= . <name_of_port> ( <port_expression>? )
<port_expression>
::= <port_reference>
||= { <port_reference> <, <port_reference>>* }
<port_reference>
::= <name_of_variable>
||= <name_of_variable> [ <expression> ]
||= <name_of_variable> [ <expression> : <expression> ]
<name_of_port>
::= <IDENTIFIER>
<name_of_variable>
::= <IDENTIFIER>
<module_item>
::= <parameter_declaration>
||= <input_declaration>
||= <output_declaration>
||= <inout_declaration>
||= <net_declaration>
||= <reg_declaration>
||= <integer_declaration>
||= <gate_instantiation>
||= <module_instantiation>
||= <continuous_assign>
||= <function>
<function>
::= function <range>? <name_of_function> ;
<func_declaration>*
<statement_or_null>
endfunction
<name_of_function>
::= <IDENTIFIER>
<func_declaration>
::= <parameter_declaration>
||= <input_declaration>
||= <reg_declaration>
||= <integer_declaration>
<always>
::= always @ ( <identifier> or <identifier> )
||= always @ ( posedge <identifier> )
||= always @ ( negedge <identifier> )
||= always @ ( <egde> or <edge> or ... )
<edge>
::= posedge <identifier>
||= negedge <identifier>
<parameter_declaration>
::= parameter <range>? <list_of_assignments> ;
<input_declaration>
::= input <range>? <list_of_variables> ;
<output_declaration>
::= output <range>? <list_of_variables> ;
<inout_declaration>
::= inout <range>? <list_of_variables> ;
<net_declaration>
::= <NETTYPE> <charge_strength>? <expandrange>? <delay>? <list_of_variables> ;
||= <NETTYPE><drive_strength>? <expandrange>? <delay>? <list_of_assignments> ;
<NETTYPE>
::= wire
||= wor
||= wand
||= tri
<expandrange>
::= <range>
||= scalared <range>
||= vectored <range>
<reg_declaration>
::= reg <range>? <list_of_register_variables> ;
<integer_declaration>
::= integer <list_of_integer_variables> ;
<continuous_assign>
::= assign <drive_strength>? <delay>? <list_of_assignments>;
<list_of_variables>
::= <name_of_variable> <, <name_of_variable>>*
<name_of_variable>
::= <IDENTIFIER>
<list_of_register_variables>
::= <register_variable> <, <register_variable>>*
<register_variable>
::= <IDENTIFIER>
<list_of_integer_variables>
::= <integer_variable> <, <integer_variable>>*
<integer_variable>
::= <IDENTIFIER>
<charge_strength>
::= ( small )
||= ( medium )
||= ( large )
<drive_strength>
::= ( <STRENGTH0> , <STRENGTH1> )
||= ( <STRENGHT1> , <STRENGTH0> )
<STRENGTH0>
::= supply0
||= strong0
||= pull0
||= weak0
||= highz0
<STRENGTH1>
::= supply1
||= strong1
||= pull1
||= weak1
||= highz1
<range>
::= [ <expression> : <expression> ]
<list_of_assignments>
::= <assignment> <, <assignment>>*
<gate_instantiation>
::= <GATETYPE> <drive_strength>? <delay>? <gate_instance> <, <gate_instance>>* ;
<GATETYPE>
::= and
||= nand
||= or
||= nor
||= xor
||= xnor
||= buf
||= not
<gate_instance>
::= <name_of_gate_instance>? ( <terminal> <, <terminal>>* )
<name_of_gate_instance>
::= <IDENTIFIER>
<terminal>
::= <identifier>
||= <expression>
<module_instantiation>
::= <name_of_module> <parameter_value_assignment>? <module_instance> <,<module_instance>>* ;
<name_of_module>
::= <IDENTIFIER>
<parameter_value_assignment>
::= #( <expression> <,<expression>>*)
<module_instance>
::= <name_of_module_instance> ( <list_of_module_terminals>? )
<name_of_module_instance>
::= <IDENTIFIER>
<list_of_module_terminals>
::= <module_terminal>? <,<module_terminal>>*
||= <named_port_connection> <,<named_port_connection>>*
<module_terminal>
::= <identifier>
||= <expression>
<named_port_connection>
::= . IDENTIFIER ( <identifier> )
||= . IDENTIFIER ( <expression> )
<statement>
::= <assignment>
||= if ( <expression> )
<statement_or_null>
||= if ( <expression> )
<statement_or_null>
else
<statement_or_null>
||= case ( <expression> )
<case_item>+
endcase
||= casex ( <expression> )
<case_item>+
endcase
||= casez ( <expression> )
<case_item>+
endcase
||= for ( <assignment> ; <expression> ; <assignment> ) <statement>
||= <seq_block>
||= disable <IDENTIFIER> ;
||= forever <statement>
||= while ( <expression> ) <statement>
<statement_or_null>
::= statement
||= ;
<assignment>
::= <lvalue> = <expression>
<case_item>
::= <expression> <,<expression>>* : <statement_or_null>
||= default : <statement_or_null>
||= default <statement_or_null>
<seq_block>
::= begin
<statement>*
end
||= begin : <name_of_block>
<block_declaration>*
<statement>*
end
<name_of_block>
::= <IDENTIFIER>
<block_declaration>
::= <parameter_declaration>
||= <reg_declaration>
||= <integer_declaration>
<lvalue>
::= <IDENTIFIER>
||= <IDENTIFIER> [ <expression> ]
||= <concatenation>
<expression>
::= <primary>
||= <UNARY_OPERATOR> <primary>
||= <expression> <BINARY_OPERATOR>
||= <expression> ? <expression> : <expression>
<UNARY_OPERATOR>
::= !
||= ~
||= &
||= ~&
||= |
||= ~|
||= ^
||= ~^
||= -
||= +
<BINARY_OPERATOR>
::= +
||= -
||= *
||= /
||= %
||= ==
||= !=
||= &&
||= ||
||= <
||= <=
||= >
||= >=
||= &
||= |
||= <<
||= >>
<primary>
::= <number>
||= <identifier>
||= <identifier> [ <expression> ]
||= <identifier> [ <expression> : <expression> ]
||= <concatenation>
||= <multiple_concatenation>
||= <function_call>
||= ( <expression> )
<number>
::= <NUMBER>
||= <BASE> <NUMBER>
||= <SIZE> <BASE> <NUMBER>
<NUMBER>
A number can have any of the following characters: 0123456789abcdefxzABCDEFXZ
<SIZE>
::= 'b
||= 'B
||= 'o
||= 'O
||= 'd
||= 'D
||= 'h
||= 'H
<SIZE>
A size can have any number of the following digits: 0123456789.
<concatenation>
::= { <expression> <,<expression>>* }
<multiple_concatenation>
::= {<expression> {<expression><,<expression>>*} }
<function_call>
::= <name_of_function> ( <expression> <,<expression>>*)
<name_of_function>
::= <IDENTIFIER>
<identifier>
An identifier is any sequence of letters, digits, and the underscore character ( _ ), where the first character is a letter or underscore. Upper case and lower case letters are treated as different characters. Identifiers can be any size, and all characters are significant. Escaped identifiers start with the backslash character (\) and end with a space. The leading backslash character (\) is not part of the identifier. Use escaped identifiers to include any printable ASCII characters in an identifier.
<delay>
::= # <NUMBER>
||= # <identifier>
||= # ( <expression> <,<expression>>* )