Chapter 1

Foundation Express with Verilog HDL

Foundation Express translates and optimizes a Verilog HDL description into an internal gate-level equivalent, then compiles this representation to produce an optimized architecture-specific design in a given FPGA or CPLD technology.

This chapter introduces the main concepts and capabilities of Foundation Express in the following sections.

• “Hardware Description Languages”
  
  
• “Foundation Express Design Process”
  
  
• “Using Foundation to Compile a Verilog HDL Design”
  
  
• “Design Methodology”