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A Verilog circuit description can be one of two types; a structural description or a functional description, also referred to as a Register Transfer Level (RTL) description. A structural description defines the exact physical makeup of the circuit, showing the details of the components and the connections between them. A functional or RTL description describes a circuit in terms of its registers and the combinatorial logic between the registers.
The style of your initial Verilog description has a major effect on the characteristics of the resulting gate-level design synthesized by Foundation Express. The organization and style of a Verilog description determines the basic architecture of your design. Because Foundation Express automates most of the logic-level decisions required in your design, you can concentrate on architectural tradeoffs.
You can use Foundation Express to make some of the high-level architectural decisions. Certain Verilog constructs are well suited to synthesis. To make these decisions and use the constructs, you need to become familiar with the concepts covered in the following sections of this chapter.